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Electronics engineers

Official title Electronics Engineers, Except Computer (SOC 17-2072)

Also called Radio frequency engineer, Analog engineer, Mixed-signal engineer, Embedded electronics engineer, Microwave engineer

In brief

In May 2025, BLS counted 96,900 US electronics engineers, with median pay of $130,220 a year. Of the BLS counts since 2021, the highest was 107,170, in May 2021. The earliest figure here is an estimate of 30,000 from 1940, not measured the same way as today's count. The last full technology era for electronics engineers: Cloud EDA, model-based design, and AI-assisted DRC, 2015 to 2023.

What the sources say

Official outlook

BLS projects employment to grow 3.7% from 2025 to 2035.

BLS Employment Projections 2025-35

AI exposure studies

Data as of BLS OEWS May 2025; BLS Employment Projections 2025-35. BLS publishes these counts as yearly survey snapshots and cautions against reading them as a precise trend.

Last updated .

Cite this page
APA

Future History. (2026, October 11). Electronics engineers: jobs and pay since 1940 [Data set; data as of BLS OEWS May 2025; BLS Employment Projections 2025-35]. https://futurehistory.earth/timeline/17-2072

Chicago

Future History. "Electronics engineers: jobs and pay since 1940." Data as of BLS OEWS May 2025; BLS Employment Projections 2025-35. Last modified October 11, 2026. https://futurehistory.earth/timeline/17-2072.

BibTeX

@misc{futurehistory_17_2072, author = {{Future History}}, title = {Electronics engineers: jobs and pay since 1940}, year = {2026}, month = oct, howpublished = {\url{https://futurehistory.earth/timeline/17-2072}}, note = {Last updated 2026-10-11. Data as of BLS OEWS May 2025; BLS Employment Projections 2025-35}, }

The access date is today's date on your device.

drag to travel through time
1925195019752000now
2026
Known then as Radio Engineer (IRE era; wireless telegraph and broadcast)
Known then as Electronics Engineer / Communications Engineer (wartime radar and postwar broadcast era)
Known then as Electronics Engineer (post-IC, semiconductor expansion era)
Known then as Electronics Engineer / Hardware Engineer (personal electronics and cellular era)
Known then as Electronics Engineers, Except Computer (BLS SOC 17-2072)
Known today as Electronics Engineers, Except Computer (BLS SOC 17-2072)
Projected to still be called Electronics Engineers, Except Computer (BLS SOC 17-2072)
Data from the May 2025 survey
US Employment
97K
Est.

Stated in source: BLS OEWS

Official statistic
Report an error
Median Annual Wage
$130,220
Est.

≈ $126,881 in 2024 prices (derived by us, CPI-adjusted)

Official statistic
Report an error
Beat · 1912

May 22, 1912: the Institute of Radio Engineers is chartered in New York City with approximately 50 founding members. The IRE is explicitly devoted to "radio communication and to allied branches of applied electricity", a deliberate separation from the older American Institute of Electrical Engineers (AIEE), which was focused on power engineering. The IRE's founding marks the first institutional recognition of electronics engineering as a distinct profession. Its membership will grow from 6,000 in 1940 to 96,500 by 1962, at which point it is larger than the AIEE.

Beat · 1941

The MIT Radiation Laboratory opens in October 1940 and reaches full operation in 1941, employing thousands of physicists and engineers on radar development under contract with the US Army and Navy. The Rad Lab, as it is known, becomes the largest single concentration of electronics engineering talent in American history to that point: by 1945 it employs 4,000 people and has designed over 100 radar systems. The physicists and engineers who trained there during the war return to universities and industry after 1945 and form the backbone of the postwar electronics engineering profession. The transistor's inventors (Shockley, Bardeen, Brattain) all did wartime electronics work.

Beat · 1947

December 23, 1947: John Bardeen, Walter Brattain, and William Shockley demonstrate the point-contact transistor at Bell Labs in Murray Hill, New Jersey. Bell Labs publicizes the invention on June 30, 1948. The three are awarded the 1956 Nobel Prize in Physics. The transistor marks the beginning of solid-state electronics and will, within fifteen years, make vacuum tubes obsolete for almost all signal-processing applications. The first commercial hearing aids using transistors appear in 1952; the first transistor radio (Regency TR-1) in November 1954. Bell Labs charges patent licensees a modest $25,000 fee and holds a 1952 symposium to share the technology broadly, accelerating the semiconductor industry formation.

Beat · 1958

September 12, 1958: Jack Kilby of Texas Instruments demonstrates the first working integrated circuit, a germanium phase-shift oscillator with hand-wired connections. U.S. Patent 3,138,743 is filed on February 6, 1959. Robert Noyce of Fairchild Semiconductor independently conceives the planar monolithic IC in January 1959 and files a competing patent; Noyce's interconnection scheme using oxidized silicon and deposited metal becomes the commercial standard. The integrated circuit will collapse the size, cost, and power consumption of electronics by orders of magnitude over the following three decades and generate the semiconductor industry that employs tens of thousands of electronics engineers.

Beat · 1963

January 1, 1963: the Institute of Radio Engineers and the American Institute of Electrical Engineers merge to form the Institute of Electrical and Electronics Engineers (IEEE) with 150,000 members, 140,000 of them in the United States. By the time of its founding, the IRE had 96,500 members to the AIEE's 57,000, reflecting how thoroughly electronics had outgrown power engineering as the dominant employer of engineering talent. The IEEE's founding is the formal institutional recognition that electronics engineering had absorbed electrical engineering in terms of workforce size. IEEE will go on to set the professional standards, certification frameworks, and publication norms that govern electronics engineering globally.

Beat · 2001

The dot-com bust and telecom collapse of 2001-2003 produce the worst unemployment conditions for electronics engineers in recorded BLS history. In early 2003, the unemployment rate for electrical and electronic engineers reaches 7%, roughly six times the 1997 baseline of about 1.1%. The telecom sector had overbuilt fiber and wireless infrastructure through the late 1990s; when capital markets reversed, enormous hardware engineering teams were laid off at Lucent, Motorola, Nortel, and dozens of equipment vendors. Simultaneously, consumer electronics manufacturing was migrating to Taiwan and China at scale. The combined effect was a structural reduction: total electrical and electronics engineers declined from approximately 385,000 in 2002 to roughly 300,000 by the mid-2010s, a contraction of roughly 22% that the profession did not recover from in absolute terms.

Beat · 2024

BLS OEWS May 2024 reports 93,940 electronics engineers (17-2072) earning a median of $127,590. The occupation is now about half the size it was in the late 1990s peak, but demand has stabilized and is growing modestly: the 5G/6G infrastructure buildout, persistent demand for ITAR-controlled military and aerospace electronics, medical device hardware, and the EV/AI infrastructure power electronics boom have created a domestic engineering base that is difficult to offshore. AI EDA tools (Cadence Allegro X AI, Ansys HFSS Copilot, Keysight PathWave AI Engine) are increasing per-engineer throughput materially, making the profession more productive even as headcount holds relatively flat.

How to read this number

OEWS is a point-in-time survey snapshot, not a continuous time series; BLS advises against using it for year-over-year trend comparison.

Each dot is a cited figure over time; the dotted line only links them (values between aren't measured). Hollow dots are estimates.

Official statistic: Copied by a script from a statistics agency table or a published study's table, not retyped by hand. BLS figures and the forecast and exposure tables are also re-checked against that table on every data run. Researched context: Researched from the cited source rather than copied from it by a script, so it is not machine-checked yet. Spot a mistake? Each figure has a “Report an error” link.

Cited forecasts · present → 2035

Will AI replace electronics engineers? What the research says

Each figure is stated by the named source; we publish no forecasts of our own. Where sources disagree, we show the disagreement rather than an average.

Each figure is stated by the named source; we publish no forecasts of our own. Where sources disagree, the spread is the honest signal.

What published forecasts say
Forecast change in the number of people doing this work, as published by each named source. Bars share one scale on every role, centred on zero and reaching the end at ±30%. Grey marks a small change, 3% or less either way.
BLS Employment Projections 2025-35
→ 2035
+3.7%
BLS National Employment Matrix, 2025-35 cycle, line for SOC 17-2072 (Electronics engineers, except computer): 98.2 thousand jobs in 2025, projected 101.8 thousand in 2035, a change of +3.6 thousand (+3.7%). Matrix employment counts all jobs in the occupation, including self-employed workers (0.4% of this occupation in 2025). The average for all occupations in this cycle is +3.5%.
Official statisticReport an error
How exposed is this work to AI (research measures)
Scores as published by each study. Each row says what it measures. These measure what AI could technically do, not forecasts of jobs lost.
Eloundou et al. (2023), "GPTs are GPTs"
2023 study · Share of tasks exposed to LLMs (β, human-rated)
51.5%
of tasks
What this measures

Published occupation-level exposure from the paper's occ_level.csv for O*NET-SOC 17-2072.00 Electronics Engineers, Except Computer. Shown: human-rated β = 0.515, the share of the occupation's tasks an LLM could do in at least half the time at equal quality, counting tasks that need LLM-powered software at half weight (β = E1 + 0.5 × E2). Other published measures for this occupation: human-rated α (LLM alone) 0.353 and γ (all LLM-assisted) 0.676; GPT-4-rated β 0.574. This measures how much of the work an LLM could touch, not how many jobs disappear.

Official statisticReport an error
Today, in this role

What's changing day to day for electronics engineers

Three parts of your work where AI is already doing real lifting, and what stays yours.

AI is sitting alongside you hereDesign and lay out mixed-signal and RF printed circuit boards using Cadence Allegro X AI or Altium 365 AI Copilot: define stackup, impedance targets, RF trace geometry, and power island isolation strategy

Design and lay out mixed-signal and RF printed circuit boards using Cadence Allegro X AI or Altium 365 AI Copilot: define stackup, impedance targets, RF trace geometry, and power island isolation strategy; use AI global placement to evaluate thousands of component arrangements for signal integrity, RF isolation, and thermal management simultaneously; review AI-generated placement for critical analog-to-digital return current paths, RF shielding effectiveness, and assembly-process constraints before routing sign-off.[7],[9]

Where your edge is

Allegro X AI compresses three-day PCB placement tasks to minutes, but AI placement optimizes for wire-length and DRC clearance: it does not model RF isolation, EMC partition effectiveness, or the grounding return current paths that determine whether a mixed-signal board meets its spurious-free dynamic range specification. Build a pre-placement RF partition checklist (ground plane splits, RF shielding walls, digital keepout zones around ADC reference planes) so your AI-generated layout review is structured and systematic rather than an ad-hoc EMC search.

AI is sitting alongside you hereDesign and simulate RF/microwave circuits (low-noise amplifiers [LNAs], power amplifiers [PAs], mixers, voltage-controlled oscillators [VCOs], and matching networks) using Keysight PathWave ADS with its AI-guided harmonic balance and load-pull automation: specify noise figure, gain, IP3, and P1dB targets

Design and simulate RF/microwave circuits (low-noise amplifiers [LNAs], power amplifiers [PAs], mixers, voltage-controlled oscillators [VCOs], and matching networks) using Keysight PathWave ADS with its AI-guided harmonic balance and load-pull automation: specify noise figure, gain, IP3, and P1dB targets; let the AI optimizer sweep matching topology and component values across the Smith chart; validate AI-proposed matching network against measured S-parameter data before committing to PCB layout.[6]

Where your edge is

PathWave ADS AI automation compresses Smith-chart matching iterations from days to hours, but the optimizer works within the topology you specify, choosing between a two-element L-match, a three-element pi-network, or a transmission-line topology for your substrate and frequency band requires physical intuition about parasitics, thermal cycling, and manufacturing tolerance that the optimizer cannot model. Build deep S-parameter and noise-figure measurement skills so you can validate AI-generated matching results against bench measurements before committing a design to PCB.

AI is sitting alongside you hereModel and simulate antenna systems, RF filters, waveguide components, and electromagnetic compatibility (EMC) compliance scenarios using Ansys HFSS with the 2026 R1 GPU-accelerated solver and Engineering Copilot: use the Copilot to configure antenna simulation geometry via natural language, run GPU-parallelized radiation pattern sweeps at 17x the speed of prior solvers, and interpret far-field gain, impedance, and SAR predictions for 5G mmWave or aerospace antenna arrays

Model and simulate antenna systems, RF filters, waveguide components, and electromagnetic compatibility (EMC) compliance scenarios using Ansys HFSS with the 2026 R1 GPU-accelerated solver and Engineering Copilot: use the Copilot to configure antenna simulation geometry via natural language, run GPU-parallelized radiation pattern sweeps at 17x the speed of prior solvers, and interpret far-field gain, impedance, and SAR predictions for 5G mmWave or aerospace antenna arrays; validate AI-accelerated results against anechoic-chamber measurements before EMC pre-scan.[4],[5]

Where your edge is

HFSS 2026 R1 accelerates radiation pattern simulation 17x, but simulation accuracy depends critically on geometry fidelity, dielectric loss model accuracy, and correct boundary conditions at connector and cable interfaces: factors the Copilot cannot validate for you. Build a structured benchmark practice: before trusting AI-accelerated parametric sweeps for a new antenna topology or substrate, validate against a known analytical closed-form or published measurement to confirm your material model and mesh density are correct.

Where electronics engineers go next

Natural next steps for someone with your foundation: not exits, evolutions.

What each move takes

A direction you could grow

Architectural and Engineering Managers

Senior Electronics Engineers who build program management, vendor governance, and AI tool evaluation skills are well-positioned to move into Engineering Manager roles overseeing hardware programs. This transition is especially timely: organizations in defense electronics, medical devices, consumer wireless, and telecom infrastructure all need managers who understand both the technical domain (RF, analog, mixed-signal) and the AI EDA toolset reshaping how designs are executed. Engineering Managers retain technical credibility while operating at budget, headcount, and roadmap scope where AI displacement pressure is minimal. Bloomberg Intelligence projects AI adds $6B to the EDA market through 2030: organizations need engineering leaders who can evaluate these tools and build team capability. BLS projects strong demand for engineering managers tied to electronics and semiconductor investment.

What you'd add
  • · Hardware program management: milestone planning for multi-phase product development (concept, prototype, DVT, PVT), certification schedules for FCC/IEC/DO-160, supplier qualification timelines
  • · AI tool evaluation and governance: building team standards for when AI-generated simulation results may be used to make design-commit or regulatory-submission decisions
  • · Regulatory strategy: managing FCC, FDA 510(k)/De Novo, and DO-160 certification programs; coordinating with notified bodies and test laboratories
  • · People management: hiring RF, analog, and embedded engineers; technical interview design; career development for specialists
  • · Executive communication: translating RF compliance margin, EMC re-test risk, and silicon revision costs into portfolio-level business impact
What it takesSome new skills to pick up
Tools of the era

How has the work of electronics engineers changed since 1912?

The tools that defined the work, one line per era. Select an era to see how it reshaped the work.

  • Vacuum tube circuits and graphical design methods

    The first electronics engineers designed entirely with vacuum tubes: triodes, tetrodes, pentodes, and magnetrons. Their design tools were graphical: characteristic curves plotted on paper, load lines drawn by hand, and Smith charts (invented by Phillip Hagar Smith at Bell Labs in 1939) for impedance matching. Circuit analysis used Maxwell's equations, transmission-line theory, and the nascent network theory that MIT's Vannevar Bush and Bell Labs' Harry Nyquist and Claude Shannon were developing in the 1920s-1940s. Slide rules handled numerical computation. The vacuum tube limited electronics to room-temperature, high-voltage, high-power, bulky equipment, but it enabled radar, broadcast radio, long-distance telephony, and the first electronic computers.

    Effect on the work

    The vacuum tube era required large teams of engineers for even modest systems: the MIT Radiation Laboratory employed over 4,000 people by 1945 working on radar systems that would today be designed by a handful of engineers using simulation software. High labor intensity per circuit function was a structural feature of the era.

  • Transistor and discrete solid-state components

    William Shockley, John Bardeen, and Walter Brattain demonstrated the point-contact transistor at Bell Labs on December 23, 1947. Texas Instruments produced the first commercial silicon transistor in 1954. The transistor replaced the vacuum tube for most signal-amplification and switching functions within fifteen years: it operated at lower voltage, consumed less power, generated less heat, and was far smaller and more reliable. For electronics engineers, the transistor both simplified and complicated the job. Circuits became smaller and more numerous, demanding tighter understanding of device physics (minority carrier injection, base-emitter biasing, junction capacitance) that the vacuum tube's macro-scale behavior had not required. By 1960 the first transistorized consumer radios, hearing aids, computers, and military avionic systems were in production, and electronics engineers needed fluency in both device physics and circuit topology.

    Effect on the work

    The transistor dramatically increased what one engineer could accomplish per unit of time: a transistor radio contained perhaps several transistors where a comparable vacuum tube design would have used several tubes with much larger support circuitry. This amplified the engineer's design reach without immediately reducing headcount, as demand for new electronics products expanded faster than per-engineer productivity improved.

  • Integrated circuits (Kilby/Noyce 1958-59) and early SPICE simulation

    Jack Kilby built the first working integrated circuit at Texas Instruments on September 12, 1958, using germanium with gold wire bonds; Robert Noyce of Fairchild independently conceived the planar monolithic IC in 1959, which became the commercial standard. The IC meant that an electronics engineer could design a chip containing dozens, then hundreds, then thousands of transistors and have them fabricated in silicon simultaneously. SPICE (Simulation Program with Integrated Circuit Emphasis) was developed at UC Berkeley in 1972 and by the late 1970s was running on institutional computers, giving engineers the first analytical tool that could simulate complex transistor-level circuits numerically rather than by hand. The IC era transformed the electronics engineer's vocabulary: instead of selecting off-the-shelf components and wiring them together, engineers increasingly worked at the level of topologies, architectures, and system-level integration. The analog circuit design canon, which Bell Labs engineers had built up through the 1950s and 1960s, was codified in textbooks by Sedra, Smith, Razavi, and others that are still in use today.

    Effect on the work

    Integrated circuits allowed enormous complexity to be achieved by a small engineering team, but also opened product categories (minicomputers, electronic instruments, early medical monitors) that did not previously exist. Employment of electronics engineers expanded substantially through the 1960s and 1970s as ICs enabled entirely new product markets rather than simply replacing older designs.

  • EDA workstations: Cadence, Mentor, Synopsys, and personal computer simulation (SPICE on PC)

    Electronic Design Automation arrived as a commercial category in the mid-1980s when Sun Microsystems and Apollo Computer workstations became affordable enough for engineering departments. Cadence Design Systems (founded 1988 from the merger of SDA Systems and ECAD) and Mentor Graphics (founded 1981) industrialized schematic capture, PCB layout, and analog simulation on workstation platforms. SPICE migrated from shared mainframes to individual engineering workstations by 1985, and to personal computers by 1990 (PSpice, the PC port, had its first commercial release in 1984). By 1995 an electronics engineer had a personal workstation capable of simulating circuits that would have required an institutional computing center a decade earlier. PCB layout moved from physical tape-up (called "taping out" literally, with adhesive tape on Mylar) to interactive graphical layout on-screen. For the first time, a single engineer could go from concept to verified schematic to routed board to fabrication-ready Gerber files without leaving their desk.

    Effect on the work

    EDA workstations substantially increased per-engineer productivity and enabled smaller teams to design more complex products. They did not reduce the engineering workforce in absolute terms through the 1980s-1990s, because demand for new electronic products expanded faster than per-person throughput increased. The real employment-shrinking effect came after 2001 when Asian manufacturing absorbed the consumer-electronics design work that had employed large US engineering teams.

  • Modern EDA platforms: HFSS, ADS, Virtuoso (3D EM simulation and RF-aware design)

    The 2000s saw RF and microwave simulation move from an academic specialty to a standard engineering workflow tool, driven by cellular telephony (the 2G-to-3G-to-4G transition created enormous demand for RF engineers) and the Wi-Fi/Bluetooth boom. Ansys HFSS (High Frequency Structure Simulator), acquired by Ansoft which Ansys bought in 2008, became the industry standard for 3D EM simulation of antennas, RF cavities, and waveguide components. Keysight's Advanced Design System (ADS), developed from the HP Microwave Design System of the 1980s, became the standard for RF circuit design and system-level link budget simulation. Cadence's Virtuoso platform, with its Spectre SPICE simulator, became the dominant environment for custom analog and RF IC design at foundries worldwide. These tools required weeks of training to use effectively, raising the specialization floor for RF and analog engineers and creating a recognizable skill taxonomy: ADS for microwave, HFSS for EM, Virtuoso/Spectre for analog IC, Cadence Allegro or Mentor PADS for PCB.

    Effect on the work

    The specialized EDA toolchain of the 2000s concentrated electronics engineering employment in companies and roles that could justify the tool licensing costs. This favored large defense primes, semiconductor companies, and well-funded startups over small design shops. US electronics engineering employment continued declining as consumer electronics design migrated to Asia, but the defense, aerospace, and medical device sectors held steady because ITAR controls, FDA clearance requirements, and DO-160 qualification regimes kept design work onshore.

  • Cloud EDA, model-based design, and AI-assisted DRC (Altium 365, Cadence cloud, Keysight cloud)

    Cloud computing changed how EDA licenses were purchased and deployed, but more importantly enabled multi-site collaboration on electronic designs for the first time without expensive file-transfer workflows. Altium 365, launched in 2020 as a cloud-connected PCB design platform, allowed global teams to share live schematic and layout data, check supply-chain availability of components against real-time distributor stock, and manage design revisions in a version-controlled environment. Keysight moved PathWave to a cloud-hosted subscription model. Cadence offered cloud-bursting for simulation jobs too large for local workstations. AI began appearing as a feature within existing tools: Altium added AI-powered component recommendation based on historical design choices and supply chain data; Cadence began embedding machine-learning-based design rule checking. This era set the infrastructure for the more dramatic AI-native tooling that arrived 2023-2026.

  • AI-native EDA: Cadence Allegro X AI, HFSS Engineering Copilot, Keysight PathWave AI Engine, Spectre AI

    Between 2023 and 2026 the major EDA vendors embedded generative AI and machine-learning optimizers directly into the tools electronics engineers use daily. Cadence Allegro X AI compresses a three-day PCB placement task to minutes with a 10x turnaround improvement. Ansys HFSS 2026 R1 delivers 17x faster radiation pattern simulation for antenna design. The Ansys Engineering Copilot (2025 R2) allows natural-language setup of simulation scenarios across HFSS, Maxwell, and Fluent. Keysight's PathWave AI Engine automates load-pull optimization for power amplifier design, collapsing weeks of Smith-chart iteration to hours. Cadence Spectre AI accelerates analog Monte Carlo and process-corner simulations in Virtuoso Studio. The AI tooling wave does not eliminate the electronics engineer's job: it eliminates the most tedious iterative work (placement iteration, matching network sweep, simulation corner coverage) while leaving the high-judgment decisions intact. Regulatory sign-off (FCC, IEC 60601, DO-160), RF architecture definition, hands-on lab bring-up, and failure analysis remain firmly human.

    Effect on the work

    The AI EDA wave is projected to increase per-engineer throughput substantially without immediately reducing headcount, similar to the effect of SPICE workstations in the 1980s. Whether it eventually reduces team size depends on whether AI-accelerated speed generates proportional new product demand. The 5G/6G infrastructure rollout, EV power electronics, and defense modernization programs appear likely to absorb the productivity gain as faster development cycles rather than smaller teams, at least through 2034.

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Electronics Engineers, Except Computer employment and pay by year

On record since1912
Latest US employment96,900 (May 2025)Source: BLS OEWS May 2025Official statisticReport an error
Latest US median pay$130,220 (May 2025)Source: BLS OEWS May 2025Official statisticReport an error
Outlook+3.7% by 2035Source: BLS Employment Projections 2025-35Official statisticReport an error
View all 28 years of cited US data, each linked to its source
YearUS employmentAnnual pay (median unless marked)SourceReport
194030,000n/aEst., Formation of IEEE by the Merger of AIEE… Researched contextReport
1950100,000n/aEst., Formation of IEEE by the Merger of AIEE… Researched contextReport
1963180,000n/aEst., Formation of IEEE by the Merger of AIEE… Researched contextReport
1997n/a$61,200Est., BLS OEWS Researched contextReport
2002173,000n/aEst., Computerworld Researched contextReport
2003137,320$71,370BLS OEWS May 2003 Official statisticReport
2004135,560$75,770BLS OEWS May 2004 Official statisticReport
2005130,050$78,030BLS OEWS May 2005 Official statisticReport
2006131,880$81,050BLS OEWS May 2006 Official statisticReport
2007133,870$83,340BLS OEWS May 2007 Official statisticReport
2008139,930$86,370BLS OEWS May 2008 Official statisticReport
2009135,990$89,310BLS OEWS May 2009 Official statisticReport
2010133,660$90,170BLS OEWS May 2010 Official statisticReport
2011136,310$91,500BLS OEWS May 2011 Official statisticReport
2012134,960$91,820BLS OEWS May 2012 Official statisticReport
2013135,350$94,250BLS OEWS May 2013 Official statisticReport
2014133,990$95,790BLS OEWS May 2014 Official statisticReport
2015135,390$98,270BLS OEWS May 2015 Official statisticReport
2016132,100$99,210BLS OEWS May 2016 Official statisticReport
2017134,930$102,180BLS OEWS May 2017 Official statisticReport
2018134,110$102,700BLS OEWS May 2018 Official statisticReport
2019128,800$105,570BLS OEWS May 2019 Official statisticReport
2020122,320$107,540BLS OEWS May 2020 Official statisticReport
2021107,170$104,820BLS OEWS May 2021 Official statisticReport
2022106,640$108,170BLS OEWS May 2022 Official statisticReport
202396,410$119,200BLS OEWS May 2023 Official statisticReport
202493,940$127,590BLS OEWS May 2024 Official statisticReport
202596,900$130,220BLS OEWS May 2025 Official statisticReport
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